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基于System Generator的Gardner算法设计与实现 被引量:2

Design and realization of Gardner algorithm based on System Generator
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摘要 采用Gardner算法,对QPSK调制解调系统中的位同步系统进行设计与实现,大大提高了系统性能和资源利用率。重点阐述采用FPGA开发环境System Generator系统设计工具进行位同步设计与实现的方法,并在Lyrtech SFFSDR DP(Lyrtech小型软件无线电开发平台)上进行硬件协同仿真与验证,同时给出了相应的仿真波形。仿真结果在软件无线电技术及应用方面有着重要的理论研究价值,在开发设计上可大幅度地缩短开发周期,节约成本。 The Gardner algorithm is adopted to the design and realization of symbol synchronization in the QPSK modulation and demodulation system,which can greatly improve system performance and resource utilization .The method of how to use the xilinx system generator system design tool to design and realize symbol synchronization is especially expounded,at the same time,the new idea of FPGA hardware-in-the-loop co-simulation and attestation on the Lyrtecb SFF SDR DP is provided. Also the relevant simulation wave is shown. Simulation is conducted,which provides an important theoretical research value in software defined radio technology and applications. The method is used to shorten the development cycle and save cost.
机构地区 桂林电子科大学
出处 《电子设计工程》 2010年第7期16-18,共3页 Electronic Design Engineering
基金 2009年广西研究生教育创新计划项目(2009105950810M12)
关键词 GARDNER算法 SYSTEM GENERATOR 软件无线电 硬件协同仿真 Gardner algorithm system generator software defined radio hardware-in-the-loop co-simulation
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参考文献1

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同被引文献14

  • 1蔡晓宁,陈仲林,董戈,谢珊英.数字PID控制器的硬件优化设计[J].中国科学院研究生院学报,2010,27(5):690-694. 被引量:2
  • 2阮颐,黄培中,卫炎.有限冲激响应滤波器的设计与实现[J].上海交通大学学报,2004,38(12):2045-2047. 被引量:2
  • 3蒋立平,谭雪琴,王建新.一种基于FPGA的高效FIR滤波器的设计与实现[J].南京理工大学学报,2007,31(1):125-128. 被引量:16
  • 4熊伟,胡永辉,梁青.CSD编码中共享子表达式统计特性的研究[J].空军工程大学学报(自然科学版),2007,8(4):58-61. 被引量:2
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  • 7HWANG James, BALLAGH Jonathan. Building Custom FIR Filters Using System Generator [J]. Lecture notes in computer science, 2002, vol2438, 1101-1104.
  • 8Kenneth N. Macpherson, Robert W. Swewart. Low FPGA Area multiplier blocks for full parallel FIR filter[C]. IEEE, 2004.
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