摘要
UART因其可靠性高,传输距离远,线路简单而成为比较广泛的串行数据通信电路,而现在大部分集成电路通信用的UART芯片,存在成本高,电路复杂,移植性较差等缺点,本文提出了一种基于FPGA的嵌入式UART模块化设计方法,将UART模块集成到FPGA上,而这些模块功能全部基于verilogHDL硬件描述语言,并通过有限状态机来实现,增强了设计的灵活性,降低了成本,并可以作为一个IP核,移植到其它FPGA嵌入式系统中,可移植性增强。
UART,because of its high reliability,long transmission distance and the simple line,is becoming more extensive serial data communication circuit.But now most of the integrated UART chips used in communications,have faults of high cost and poor portability.The circuit of the chip is complex.This paper presents a method that UART module based on FPGA.UART module integrated into the FPGA.While all functions of these modules are based on verilogHDL hardware description language,and realize through the finite state machine.This design enhanced flexibility and reduced costs,and can be used as an IP core that ported into other FPGA embedded systems,enhancing the portability.
出处
《价值工程》
2010年第19期148-149,共2页
Value Engineering
