摘要
针对测试性设计要求,基于IEEE1149.4标准,利用相关性模型对某控制盒的混合电路系统进行测试性分析与建模,建立被测系统各组成单元与边界扫描测试之间的相关性矩阵,得到优化的边界扫描器件置换与边界扫描结构置入方法.通过制定相应的诊断策略,给出一种通用的混合信号电子系统BIT设计方案.系统验证实验表明,该方法测试迅速,可以有效地提高电子系统测试性.
In view of the requirement of design for testability,based on the IEEE Std 1149.4,a optimize method of the replacement and interposition of boundary scan components is proposed by using the relevance model to analyze and make modeling for a mixed-signal system,and building the dependency matrix between the parts of the circuits and the boundary scan test.A universal design of BIT is presented by making the corresponding diagnostic strategy.The verifying experiment of system indicates that the optimize method can make test rapidly and promote the testability of electronic system efficaciously.
出处
《微电子学与计算机》
CSCD
北大核心
2011年第2期157-161,共5页
Microelectronics & Computer
基金
国家自然科学基金项目(60871029)
关键词
混合信号
电路相关性模型
边界扫描
BIT
故障检测
mixed-signal
relevance model of circuit
boundary scan
builit-in test（BIT）
fault detect
