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一种用于轨到轨运算放大器的新型频率补偿结构 被引量：7

A Novel Frequency Compensation Structure for Rail-to-Rail Operational Amplifier
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摘要 针对有源OLED面板驱动芯片源驱动模块对高速低功耗运算放大器的要求,基于高阶系统频率补偿理论和小信号建立理论,通过结合共栅共源密勒(cascode Miller)补偿和输出零点补偿,提出一种用于轨到轨高速低功耗运算放大器的新型频率补偿方法,只需很小的密勒补偿电容和静态工作电流,就可以高速、稳定地驱动大电容负载。采用0.18μm CMOS数模混合信号工艺,通过EDA软件仿真,结果表明,在4 V电源电压和20 pF负载电容下,该运算放大器的轨到轨建立时间为0.76μs,静态工作电流仅为2.6μA,相位裕度为55°,只需要120 fF的密勒补偿电容。 Based on frequency compensation theory for higher-order system and small signal settling theory,a novel frequency compensation structure for rail-to-rail high-speed and low-power operational amplifier was presented for active OLED panel driver.The novel structure,which combined cascode Miller compensation with output zero compensation technique,enabled the op amp to drive heavy loads in a fast and stable way,only with small compensation capacitor and little quiescent current.The proposed circuit was designed based on 0.18 μm CMOS mixed signal process.Simulation results showed that,for a 4-V rail-to-rail input pulse and 20 pF load capacitance,the op-amp had a settling time of 0.76 μs,a quiescent current of only 2.6 μA and a phase margin of 55°,with a compensation capacitor of only 120 fF.
作者 陈宏 曾龄宇 胡乔 于奇 宁宁 王向展 邓春健
机构地区 电子科技大学电子薄膜与集成器件国家重点实验室 电子科技大学中山学院
出处 《微电子学》 CAS CSCD 北大核心 2011年第1期15-18,共4页 Microelectronics
基金 国家教育部博士点基金资助项目(200806141100) 广东省自然科学基金资助项目(8452840301001693)
关键词 频率补偿 运算放大器 建立时间 源驱动 Frequency compensation Operational amplifier Settling time Source driver
分类号 TN432 [电子电信—微电子学与固体电子学]
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参考文献8

  • 1RYU J-W, KANG E-G, PARK H-S, et al. A design of AM-OLED source driver with reduced programming time for a large scale display panel [C] // IEEE Conf Elec Dev and Sol Sta Circ. Hong Kong, China. 2005: 475-477.
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  • 5RON H, TERO P J, RUUD E G H, et al. A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries [J]. IEEE J Sol Sta Circ, 1994, 29(12) : 1505-1513.
  • 6HOGERVORST R, WIEGERINK R J, DEJONG P A L, et al. CMOS low-voltage operational amplifiers with constant-gin rail-to-rail input stage [C] // IEEE Proc ISCAS. San Diego, USAI 1992: 2876-2879.
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  • 8王为之,靳东明.一种采用共栅频率补偿的轨到轨输入/输出放大器[J].Journal of Semiconductors,2006,27(11):2025-2028. 被引量：7

二级参考文献6

  • 1Hogervorst R,Tero J P,Eschauzier R G H,et al.A compact power-efficient 3V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries.IEEE J Solid-State Circuits,1994,29:1505
  • 2Loikkanen M,Kostamovaara J.Low voltage CMOS power amplifier with rail-to-rail input and output.Analog Integr Circuits Process,2006,46:183
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  • 5Razavi B.Design of analog CMOS integrated circuits.New York:McGraw-Hill,2001
  • 6Hurst P J,Lewis S H,Keane J P,et al.Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers.IEEE Trans Circuits Syst Ⅰ,2004,51:275

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微电子学
2011年 第1期

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