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基于TD-SCDMA的CMOS低通滤波器的设计

Design on Low-pass Filter based on TD-SCDMA
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摘要 这里提出一种基于时分同步码多址技术(TD-SCDMA)的互补金属氧化物半导体(CMOS)滤波器带宽校正方法及校正电路。该方法应用于RS1012芯片(TDSCDMA无线收发芯片),该芯片采用0.18um射频(RF)COMS工艺。滤波器带宽的调节范围和调节精度在理论和投片中都得到了验证。实现该方法的RC校正电路结构简单,版图面积很小,只有0.04 mm2,电流仅为600 uA。校正电路最大调节范围设计值为+30%,校正精度为+2.1%,此测试结果与理论计算是一致的。 A novel automatic tuning method for RC filters is proposed for CMOS zero-IF transceivers.The tuning range and tuning accuracy is analyzed theoretically.The method is applied to RS1012(TDSCDMA wireless transceiver chip),the chip adopts 0.18um RF COMS process.The tunning circuit occupies 0.04,and its current comsumption is only 600uA.The measurement result of the filter and the tuning circuit shows that the maximum 30% time–constant variation could be tuned within 2.1% accuracy,this is consistent with the theoretical results.
出处 《通信技术》 2011年第1期87-89,共3页 Communications Technology
关键词 带宽自动校正 滤波器 时间常数自动校正 Automatic bandwidth adjustment low pass filter time-constant automatic adjustment
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  • 1肖珺,李永明,王志华.低功耗CMOS低噪声放大器的设计[J].微电子学,2006,36(5):670-673. 被引量:12
  • 2封春海,唐学锋,王文骐.WLAN应用的CMOS低噪声放大器设计[J].通信技术,2007,40(4):16-18. 被引量:4
  • 3[2]3GPP TS 25.221 V5.2.0 Physical channels and mapping of transport channels onto physical channels (TDD)(Release 1999)[DB/OL].ftp://ftp.3gpp.org/specs.
  • 4[3]3GPP TS 25.402 V5.1.0 Physical channels and mapping of transport channels onto physical channels (TDD)(Release 1999)[DB/OL].ftp://ftp.3gpp.org/specs.
  • 5[5]ETSI/TR 101 112 V3.2.0(1998-04),Selection Procedures for the Choice of Radio Transmission Technologies of the UMTS,UMTS 30.03 Version 3.2.0[S].
  • 6Freescale Semiconductor Technical Data.MBC13720 SiGe:C Low Noise Amplifier with Bypass Switch[EB/OL].(2008-01-25)[2010-02-17]http://www.freescale.com/webapp/sps/site/prod-summary.jsp?code=MBC13720&nodeId=0106B986995478.
  • 7Agilent Technologies.NFA Series User's Guide.N8972-90086 (EB/OL].(2001-05-01)[2010-02-17].http://www.home.agilent.com/agilent/application.jspx?nid=-34815.0.00&lc=eng&cc=US.
  • 8DONALDL G A.A Noise Optimization Technique for Integrated Low-noise Amplifiers[J].IEEE Journal of Solid-State Circuits, 2002,37(08):994-1002.
  • 9LEETH S. A 1.5 V 1.5 GHz CMOS Low Noise Amplifier[J]. IEEE Journal of Solid-State Circuits, 1997, 32(05) :745-799.
  • 10MEHENDALE M. Challenges in the Design of Embedded Real-time DSP SoCs[C]//IEEE 17th VLSI Design. India:IEEE, 2004:507-511.

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