期刊文献+
任意字段
题名或关键词
题名
关键词
文摘
作者
第一作者
机构
刊名
分类号
参考文献
作者简介
基金资助
栏目信息

异步集成电路设计方法综述 被引量：4

Methodology of Asynchronous Integrated Circuit Design-a Survey
下载PDF
导出
摘要 异步电路相对同步电路而言具有无时钟偏斜、模块化程度高、功耗低、电磁兼容性强等优势,越来越受到人们的广泛关注.异步电路设计方法是异步电路研究中的一个重点,文中将异步电路设计方法的发展历程划分为3个阶段,并着重对第3个阶段的设计方法进行了综述.根据设计方法的描述方式和设计粒度,首先将第3阶段进一步划分为语法驱动转换的设计方法、同步-异步转换的设计方法和基于定制的细粒度高性能异步流水线设计方法3类;然后从设计方法的理论基础、电路模型、设计自动化程度、电路性能等多个角度进行介绍并比较.最后对异步电路设计方法未来的发展趋势进行了展望. Asynchronous circuits have drawn increasing attentions from not only researchers in universities but also designers in corporations for their advantages in terms of no clock skew, high modularity, low power and better EMI. Design methods are critical in the researches of asynchronous circuits. In this paper, we divide the history of asynchronous circuit design into 3 stages, and in particular we give a review of the last stage. We classify the methods in the last stage into 3 classes by the specification style and the granularity of circuits： the syntax-driven method, the synchronous-toasynchronous circuits conversion method and the full-custom based design method of fine-grain asynchronous pipelines. Design methods are then surveyed and compared from several aspects. Those aspects include theory foundation, design style, design automation, and the efficiency of designed circuits. Finally, developing trends of asynchronous circuit design methods are given.
作者 任洪广 石伟 王志英 苏博 王友瑞
机构地区 国防科学技术大学计算机学院
出处 《计算机辅助设计与图形学学报》 EI CSCD 北大核心 2011年第3期543-552,共10页 Journal of Computer-Aided Design & Computer Graphics
基金 国家自然科学基金(60873015 61070037)
关键词 异步电路 设计方法 语法驱动转换 同步-异步转换 细粒度异步流水线 asynchronous circuit design method syntax-driven synchronous-to-asynchronous circuits conversion fine-grain asynchronous pipeline
分类号 TP391.7 [自动化与计算机技术—计算机应用技术]
  • 相关文献

参考文献60

  • 1Hauck S.Asynchronous design methodologies:an overview[J].Proceedings of the IEEE,1995,83(1):69-93.
  • 2van Berkel C H,Josephs M B,Nowick S M.Applications of asynchronous circuits[J].Proceedings of the IEEE,1999,87(2):223-233.
  • 3Werner T,Akella V.Asynchronous processor survey[J].Computer,1997,30(11):67-76.
  • 4Amde M,Felicijan T,Efthymiou A,et al.Asynchronous on-chip networks[J].Computers and Digital Techniques,2005,152(2):273-283.
  • 5Sokolov D,Yakovlev A.Clockless circuits and system synthesis[J].Computers and Digital Techniques,2005,152(3):298-316.
  • 6Martin A J,Nystrom M.Asynchronous techniques for system-on-chip design[J].Proceedings of the IEEE,2006,94(6):1089-1120.
  • 7Brookes S D,Hoare C A R,Roscoe A W.A theory of communicating sequential processes[J].Journal of ACM,1984,31(3):560-599.
  • 8Martin A J.Compiling communicating processes into delay-insensitive VLSI circuits[J].Distributed Computing,1986,1(4):226-234.
  • 9Sparso J,Furber S.Principles of asynchronous circuit design:a systems perspective[M].London:Kluwer Academic Publishers,2001.
  • 10Verhoeff T.Delay-insensitive codes-an overview[J].Distributed Computing,1988,3(1):1-8.

二级参考文献28

  • 1[1]Scott Hauck, Asynchronous Design Methodologies: An Overview, Proceedings of the IEEE, 1995,83 (1): 69- 93.
  • 2[2]G. Gopalakrishanan,Guest Editor's Introduction to the Special Issue on Asynchronous Systems, Integration, the VLSI Journal, 1993,15: 233-239.
  • 3[3]Gary Yeap, Practical Low Power Digital VLSI Design, Motorola Inc.
  • 4[4]S.B. Furber et al. , AMULET2e: An Asynchronous Embedded Controller, Proceedings of the IEEE, 1999,87 (2): 243-255.
  • 5[5]I. E Sutherland,Micropipeline,Communications of the ACM,1989,32(6): 720-738.
  • 6[6]G. S. Taylor et al. , Reduced Complexity Two Phase Micropipeline Latch Controller, IEEE Journal of Solid-State Circuits, 1998,33(10): 1590-1593.
  • 7G M Jacobs,R W Brodersen.A Fully Asynchronous Digital Signal Processor Using Self-timed Circuits,IEEE J.Solid-State Circuits,1990,6 (25):1526～1537
  • 8Scott Hauck,Asynchronous Design Methodo Logies.An Overview,Proceedings of the IEEE,1995,83(1):69～93
  • 9C Papachristou,MNourani,MSpining.A Multiple Clocking Scheme for Low Power RTL Design[J].IEEE Trans on VLSI,1999,7(2):266～2761
  • 10Wu Q,Pedram M,Wu X.Clock-gating and its Application to low Power Design of Sequential Circuits[J].Custom Integrated Circuits Conference,1997.Proceedings of the IEEE,1997,5(8):479～482

共引文献19

同被引文献65

  • 1Vangal S R, Howard J, Ruhl G, etal. An 80-tile sub-100-W TeraFLOPS processor in 65-nm CMOS [J]. IEEE Journal of Solid-State Circuits, 2008, 43(1): 29-41.
  • 2Clermidy F, Bernard C, Lemaire R, et al. A 477mW NoC-based digital baseband for MIMO 4G SDR [C] // Proceedings of IEEE International Solid-State Circuits Conference Digest of Technical Papers. Piscataway: IEEE Computer Society Press, 2010:278-279.
  • 3Sparso J, Furber S. Principles of asynchronous circuit design: a systems perspective [M]. London: Kluwer Academic Publishers, 2001.
  • 4Krstie M, Grass E, Gtirkaynak F K, et al. Globally asynchronous, locally synchronous circuits: overview and outlook [J]. IEEE Design & Test of Computers, 2007, 24 (5), 430-441.
  • 5Blaauw D, Chopra K, Srivastava A, et al. Statistical timing analysis: from basic principles to state of the art[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2008, 27(4): 589-607.
  • 6Beigne E, Clermidy F, Lhermet H, et al. An asynchronous power aware and adaptive NoC laased circuit[J]. IEEE Journal of Solid-State Circuits, 2009, 44(4) : 1167-1177.
  • 7International Technology Roadmap for Semiconductors. Chapter design [OL]. [2011 10-10]. http://www, itrs. net/ Link/2009ITRS/Home2009. htm.
  • 8Martin A J. The limitations to delay-insensitivity in asynchronous circuits [C] //Proceedings of the 6th MIT Conference on Advanced Research in VLSI. Cambridge: The MIT Press, 1990:263-278.
  • 9Stevens K S, Golani P, Beerel P A. Energy and performance models for synchronous and asynchronous communication [M]. IEEE Transactions on Very Large Scale Integration Systems, 2011, 19(3): 369-382.
  • 10Cortadella J, Kishinevsky M, Kondratyev A, etal. Petrify: a tool for manipulating concurrent specifications and synthesis ofasynchronous controllers [J]. IEICE Transactions Information and Systems, 1997, E80-D(3): 315-325.

引证文献4

二级引证文献3

计算机辅助设计与图形学学报
2011年 第3期

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部