摘要
分析流水线ADC数字域校准算法工作原理及实现电路的具体特点.为解决数字校准算法系数实时更新的问题,在PipeRench结构的基础上结合多重上下文动态可重构方式,提出了一种针对流水线ADC数字域的动态可重构电路.对该架构中的关键电路模块进行了设计并对整个电路架构进行了仿真,结果表明该架构可以实现流水线ADC数字域的动态重构.
Analyzes the working principles of calculating digital calibration of pipelined ADC and the specific features of the implementation circuit.To solve the problem of online renewing digital calibration ratio,a dynamic reconfigurable circuit is designed for the digital domain of pipelined ADC,based on the PipeRench structure and the Multi-context Approach.The architecture has been simulated and the result illustrate that it is capable of actualizing dynamic reconfigurable the digital domain of the pipelined ADC.
出处
《微电子学与计算机》
CSCD
北大核心
2011年第7期117-120,124,共5页
Microelectronics & Computer
基金
国家自然科学基金项目(60676014)
国家科技重大专项(2009ZX03007-002-01)
国家"八六三"目标导向项目(2009AA01Z259)
