期刊文献+

3D集成的发展现状与趋势 被引量:15

Present Situation and Development of 3D Integration
下载PDF
导出
摘要 三维集成技术的发展是技术与理念的革新过程,本文根据集成封装技术的的发展历程,提出三维集成的发展特点,阐述理念的突破如何引导技术发展,以此为主线,可以更有逻辑性的了解三维集成的发展历史与趋势。封装从器件级向系统级的发展促使了多种系统级封装概念的出现;垂直堆叠方式推动互连长度不断降低;与晶圆级封装的结合可以大幅度降低成本;从同质向异质的转变则集成了多种学科、材料与技术,是实现复杂的系统的基础。 The development of 3D integration is a revolution process of technology and concept.Based on the historical evolution of integration and packaging,the characteristics of 3D integration are introduced in this paper,showing howthe breakthrough of concept enables the progress of technology.The development trend can be described as this:advanced system level packaging offers new integration schemes,vertical stacking decreases interconnection length,combined with wafer level packaging brings potential cost reduction,and heterogeneous integration offers a path for multifunction system with meterial,subject and technology integration.
作者 夏艳
出处 《中国集成电路》 2011年第7期23-28,共6页 China lntegrated Circuit
关键词 3D集成 系统封装 异质集成 3D integration system packing heterogeneous integration
  • 相关文献

参考文献11

  • 1P.Ramm, M.J.Wolf, A.Klumpp, et al. Through silicon via technology:processes and reliability for wafer-level 3D system integration[C]. 2008 Electronic Components and Technology Conference, 2008: 841-846.
  • 2Peter Ramm, Armin Klumpp, Josef Weber, et al. 3D integration technologies[C]. 2009 Symposium on Design, Test, Integration & Packaging of MEMS/MOEMS, 2009: 71-73.
  • 3何金奇.三维(3-D)封装技术[J].微电子技术,2001,29(4):32-41. 被引量:12
  • 4Rao R. Tummala. SOP: What is it and Why? A New Microsystem-Integration Technology Paradigm-Moore' s Law for System Integration of Miniaturized Convergent System of the Next Decade [J]. IEEE Transactions on advanced packaging, 2004, 27 ( 2 ) : 241-249.
  • 5Rao R. Tummala, Madhavan Swaminathan. Introduction to System-on-Package (SOP) [M].McGraw-Hill Companies, 2008.25-60.
  • 6Gilles Poupon, System on Wafer : Proceedings of the Nicolas Sillon, David Henry, et al. A New Silicon Concept in SiP [J]. IEEE, 2009, 97 ( 1 ) : 60-69.
  • 7M.J.Wolf, P.Ramm, A.Klumpp, et al. Technologies for 3D Wafer Level Heterogeneous Integration [C].2008 Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, 2008: 123-126.
  • 8Jean-Charles Souriau, Olivier Lignier, Michel Charrier, et al. Wafer Level Processing of 3D System in Package for RF and Data Applications [C].2005 Electronics Components and Technology Conference, 2005: 356-361.
  • 9Linda Katehi, Barry Perlman, William Chappell, et al. Three Packaging architectures Dimensional Integtation and on-wafer for Heterogeneous wafer-scale circuit [R]. University of Illinois, Urbana- Champaign, IL, 2006.
  • 10X.Sun, S.Brebels, S.Stoukatch, et al. Demonstration Heterogeneous Integration of Technologies for a Ku-Band SiP Doppler Radar [C].38th European Microwave Conference, 2008:1497-1500.

二级参考文献1

共引文献11

同被引文献87

  • 1杜茂华,蒋玉齐,罗乐.Cu/Sn等温凝固芯片键合工艺研究[J].功能材料与器件学报,2004,10(4):467-470. 被引量:3
  • 2顾靖,王珺,陆震,俞宏坤,肖斐.芯片叠层封装的失效分析和热应力模拟[J].Journal of Semiconductors,2005,26(6):1273-1277. 被引量:23
  • 3王多笑,邬玉亭,褚家如.低温阳极键合技术研究[J].传感器技术,2005,24(9):37-39. 被引量:7
  • 4毕宗军,罗岚,杨军.基于SKILL语言的按比例自动缩放版图方法[J].电子器件,2006,29(4):1187-1191. 被引量:3
  • 5PETER R, ARMIN K, JOSEF W. 3D system-on-chiptechnologies for more than moore systems [J]. MicrosystTechnol, 2010, 16 (7) : 1051 -1055.
  • 62011 International Technology Roadmap for Semiconductors[S/OL]. [2012 - 12 - 03] http: //www. itrs. net/Links/2011ITRS/2011 Chapters/2011 ExecSum. pdf.
  • 7TOLGA T. System-in-package technologies for photonics[C] // Proceedings of SPIE Optoelectronic IntegratedCircuits XII. California, USA, 2010, 7605: 1 -12.
  • 8CHOUDHURY D. 3D integration technologies foremerging microsystems [ C] // Proceedings of IEEEMTT-S Int. Anaheim, CA, USA, 2010: 1-4.
  • 9STEVEN M G. Status on radiation qualification methodsfor SoC devices [R/OL]. (2011 -6 - 29) http: //www. chapterpdf. com/ebook/nepp-etw-2011 -status-on-radiation-qualification-methods-for-soc. pdf.
  • 10ROOZEBOOM F,DEKKERS W,LAMY Y. System-in-package integration of passives using 3D through-silicon vias[J]. Solid State Technology, 2008, 51 (5): 38-42.

引证文献15

二级引证文献55

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部