摘要
A ball grid array （BGA） package based on Si interposer with through silicon via （TSV） was de- signed. Thermal behaviors of the designed BGA with Si interposer has been analyzed and compared to a conventional BGA with BT substrate in the approach of finite element modeling （FEM）. The Si interposer with TSV was then fabricated and the designed BGA package was demonstrated. The designed BGA pack- age includes a 100 ~m thick Si interposer, which has redistribution copper traces on both sides. Through vias with 25 to 40 ~m diameter were fabricated on the Si interposer using deep reactive ion etching （DRIE）, plasma enhanced chemical vapor deposition （PECVD）, copper electroplating and chemical mechanical pol- ishing （CMP）, etc. TSV in the designed interposer is used as electrical interconnections and cooling chan- nels. 5 mm by 5 mm and 10 mm by 10 mm thermal chips were assembled on the Si interposer.
A ball grid array （BGA） package based on Si interposer with through silicon via （TSV） was de- signed. Thermal behaviors of the designed BGA with Si interposer has been analyzed and compared to a conventional BGA with BT substrate in the approach of finite element modeling （FEM）. The Si interposer with TSV was then fabricated and the designed BGA package was demonstrated. The designed BGA pack- age includes a 100 ~m thick Si interposer, which has redistribution copper traces on both sides. Through vias with 25 to 40 ~m diameter were fabricated on the Si interposer using deep reactive ion etching （DRIE）, plasma enhanced chemical vapor deposition （PECVD）, copper electroplating and chemical mechanical pol- ishing （CMP）, etc. TSV in the designed interposer is used as electrical interconnections and cooling chan- nels. 5 mm by 5 mm and 10 mm by 10 mm thermal chips were assembled on the Si interposer.
基金
Supported by the National S&T Major Project (No. 2009ZX02038)
the National High-Tech Research and Development (863) Program of China (No. 2009AA04321)
supported by Cisco Systems Inc
