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直接射频合成发射机中一种任意采样率变换的FPGA实现 被引量:1

An FPGA Implementation of Arbitrary Sample Rate Conversion in Direct RF Synthesis Transmitter
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摘要 软件无线电发射机中,在数字域进行正交调制之前,通常需要进行采样率变换,通过内插、滤波将低速率基带信号的采样率提升到载波NCO采样率上。随着近几年DAC技术的发展,在数字域进行直接射频合成已成为可能。介绍了一种可以在直接射频合成发射机中使用的,参数可配置的,任意采样率变换的FPGA实现方法,能够将低速率的基带信号采样率提升至射频采样率上。 In software defined radio (SDR) transmitter, the baseband data with protocol-specific symbol rate should be up-sampled to the fixed sample rate of synthesized career by arbitrary sample rate conversion (ASRC), before up-conversion. During the last few years, along with the rapid development of DAC technology, it is possible to implement direct RF synthesis using digital method. This paper presents implementation structure of a reconfigurable ASRC in FPGA, which can be used in Direct RF synthesis transmitter to interpolate the baseband data of variable symbol rate to RF sample rate.
出处 《通信对抗》 2011年第3期41-43,共3页 Communication Countermeasures
关键词 直接射频合成发射机 任意采样率转换 参数可配置 FPGA实现 direct RF synthesis transmitter arbitrary sample rate conversion(ASRC) reconfigurable FPGA implementation
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