摘要
PCIE2.0作为用于芯片间和板间互连的、高性能、点对点、基于报文互换的新型I/O互连技术,已被公认为行业的标准,在计算机系统中得到了广泛应用。PCIE2.0在物理层采用基于SERDES的串行通信技术,数据传输速率可达5Gbps,最多支持32通道。随着信号频率的增加,信号完整性问题变得日益突出,衰减、串扰和抖动的共同作用导致信号严重失真,传输距离受到限制。采用一种高效能的中继芯片,对PCIE2.0总线高速串行信号进行中继,实现了远距离传输,并在实际系统中得到了验证。
PCIE2.0 as between chips and boards used for interconnects, high-performance, point-based message exchange in the new I / O interconnect technology, has been recognized as the industry standard in the computer system has been widely used. PCIE2.0 at the physical layer of serial communication based SERDES technology, data transmission rates up to 5Gbps, the total number of channels up to 32 channels. With the increase in signal frequency, signal integrity issues become increasingly prominent, attenuation, crosstalk and jitter jointly lead to serious distortion of the signal transmission distance is limited. A high-performance relay chip, high-speed serial bus for PCIE2.0 to relay the signal to achieve the long-distance transmission, and in the actual system has been verified.
出处
《计算机技术与发展》
2011年第10期150-153,共4页
Computer Technology and Development
基金
国家自然科学基金(60873212)
