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带新解调结构的UHF RFID标签低功耗模拟前端设计 被引量:1

A Low Power Analog Frond-end Design for UHF RFID Tag with a Novel Demodulator
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摘要 基于ISO/IEC 18000-6C协议,对UHF无源电子标签模拟前端中的ASK解调电路、整流器、稳压电路等进行低功耗设计。解调电路中微分电路的加入扩大了解调电路工作范围,在解调电路近距离工作时,可以更有效地解调。整流电路采用了零阈值MOS管代替肖特基二极管,降低芯片成本。整流稳压电路可稳定地为芯片供电,供电电压2 V,建立时间仅为25μs。电路采用SMIC 0.18μm 2P4M CMOS工艺进行流片,芯片面积720μm×390μm。测试得到模拟前端整体工作电流仅2.4μA,标签工作距离大于7 m。 This work presents the design of the analog frond-end(AFE) circuits for a UHF RFID tag in compliance with the ISO/IEC 18000-6C protocol.The low power AFE circuits include a novel demodulator and a voltage rectifier as well as regulator.The ASK demodulator employs a differentiator circuit,which extends the voltage range of the input RF signal and solves the demodulating problem when the tag works close to a reader.In order to reduce the cost of the chip,NMOS transistors with zero threshold voltage are used in the rectifier instead of the Schottky diode.The voltage regulator can provide a stable voltage of 2 V and the setup time of less than 25 μs.The entire circuits have been processed with SMIC O.18 m 2P4M CMOS technology.The whole AFE occupies a die area of 720 μm×390 μm.The test results show that the AFE consumes only 2.4 μA current and the communication range of the chip is longer than 7 m.
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2011年第5期499-504,共6页 Research & Progress of SSE
基金 863计划重大项目(2008AA04A102) 国家自然科学基金资助项目(61072010)
关键词 射频识别 标签芯片 超高频 模拟前端 解调电路 RFID(radio frequency identification) tag UHF analog front-end(AFE) demodulator
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