期刊文献+

面向异构多核并行系统的层次化计算模型HmPlogP

HmPlogP: a hierarchical computation model for heterogeneous multi-core parallel systems
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摘要 在参数化LogP模型(PLogP模型)的基础上,针对异构多核并行系统通用核和加速核的异构性、存储的层次化、并行执行的层次化特征,提出了新的层次化计算模型HmPlogP。该模型对异构多核并行系统的通信和访存进行了抽象,采用向量化参数表达并行系统不同层次的特征,能够预测加速核的执行开销并以此指导并行程序的设计和优化。实验结果表明,HmPlogP模型能有效地预测通用核的点到点通信时间和加速核的访存时间。 Based on the parameterized LogP (PLogP) model, this paper proposes a new hierarchical computation model named the HmPlogP for heterogeneous multi-core parallel systems. HmPlogP considers the characteristics of the systems such as the heterogeneity of conventional cores and accelerator cores, and the hierarchy of memory access and parallelization. The model abstracts the communication and the memory access of a heterogeneous multi-core parallel system in a hierarchical way, uses vectorization parameters to represent the characteristics of a parallel system in different levels, and makes prediction of the memory access overhead of accelerating cores to direct the design and the optimization of parallel programs. The experimental result shows that the HmPlogP model can effectively predict the communication time of conventional cores and the memory access time of accelerating cores.
出处 《高技术通讯》 CAS CSCD 北大核心 2011年第11期1135-1141,共7页 Chinese High Technology Letters
基金 863计划(2009AA01A135,2009AA012108),国家自然科学基金(61173039)和中央高校基本科研业务费专项(08142007)资助项目.
关键词 计算模型 异构多核 访存 PLogP computation model, heterogeneous multi-core, memory access,PLogP
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参考文献22

  • 1Kumar R, Farkas I K, Jouppi P N, et al. Single-ISA het- erogeneous multicore architectures: the potential for pro- cessor power reduction. In: Proceedings of the 36th An- nual IEEE/ACM International Symposium on Microarchi- tecture, San Diego, USA, 2003. 81-92.
  • 2Kumar R, Tullsen D M, Ranganathan P, et al. Single- ISA heterogeneous multi-core architectures for mul- tithreaded workload performance. In: Proceedings of the 31st Annual International Symposium on Computer Archi- tecture, Munchen, Germany, 2004. 64-75.
  • 3Kistler M, Perrone M, Petrini F. Cell multiprocessor communication network: built for speed. IEEE Micro, 2006, 26(3) : 10 - 23.
  • 4Williams S, Shalf J, Oliker L, et al. The potential of the cell processor for scientific computing. In : Proceedings of the 3rd Conference on Computing Frontiers, Ischia, Ita- ly, 2006. 9-20.
  • 5Barker K J, Davis K, Hoisie A, et al. Entering the peta- flop era: the architecture and performance of Roadrunner. In: Proceedings of the 2008 ACM/IEEE Conference onSupercomputing, Austin, USA, 2008. 1-11.
  • 6Blagojevic F, Nikolopoulos D S, Stamatakis A, et al. Dy- namic multigrain parallelization on the cell broadband en- gine. In: Proceedings of the 12th ACM SIGPLAN Sympo- sium on Principles and Practice of Parallel Programming 2007, San Jose, USA, 2007. 90-100.
  • 7Blagojevic F, Stamatakis A, Antonopoulos C D, et al. RAxML-Cell: parallel phylogenetic tree inference on the cell broadband engine. In : Proceedings of the 2007 IEEE International Parallel and Distributed Processing Symposi- um, Long Beach, USA, 2007.1-10.
  • 8Crawford C H, Henning P, Michael K, et al. Accelera- ting computing with the cell broadband engine processor. In: Proceedings of the 2008 Conference on Computing Frontiers, Ischia, Italy, 2008. 3-12.
  • 9Bellens P, Perez P M, Badia R M, et al. CellSs: a pro- gramming model for the cell BE architecture. In: Pro- ceedings of the 2006 ACM/IEEE Conference on Super- computing, Tampa, USA, 2006. 86-96.
  • 10Che S, Boyera M, Meng J Y, et al. A performance study of general-purpose applications on graphics processors using CUDA. Journal of Parallel and Distributed Compu- ting, 2008, 68(10) :1370-1380.

二级参考文献40

  • 1袁伟,张云泉,孙家昶,李玉成.国产万亿次机群系统NPB性能测试分析[J].计算机研究与发展,2005,42(6):1079-1084. 被引量:13
  • 2胡伟武,赵继业,钟石强,杨旭,Elio Guidetti,吴永强.Implementing a 1GHz Four-Issue Out-of-Order Execution Microprocessor in a Standard Cell ASIC Methodology[J].Journal of Computer Science & Technology,2007,22(1):1-14. 被引量:14
  • 3Heywood T,et al. A practical hierarchical model of parallel computation.J. Parallel & Distributed Computing, 1992, 16(2):212 ~ 232
  • 4Krishnamurthy E V. Complexity issues in parallel and distributed computing. In:Parallel & Distributed Computing Handbook. Ed.Albert Y. Zomaya. McGraw-Hill, NewYork, 1996.89 ~ 126
  • 5Fortune S, Wyllie J. Parallelism in random access machines. In:Proc. of 10th Annual Symposium on Theory of Computing.1978. 114 ~ 118
  • 6Leopold C. Parallel and Distributed Computing. John Wiley & Sons, 2001
  • 7Hambrusch S E. Models for parallel computtion. In: Proc. of the 1996 Workshop on Challenges for Parallel Processing. Aug.1996.92~ 95
  • 8Culler D,et al. LogP: Towards a realistic model of parallel computation. In: Proc. of the ACM SIGPLAN Symp. on Principles & Practices of Parallel Programming, 1993. 1 ~ 12
  • 9Alpern B,et al. The uniform memory hierarchy model of computation. Algorithmica, June, 1994
  • 10Alpern B,et al. Modeling parallel computations as memory hierarchies. In: Proc. Programming Models for Massively Parallel Computers. Sept. 1993

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