摘要
MT-6000是一款时分多路复用串行数据总线控制芯片。其特点是高集成度,高容错性以及在恶劣环境下的高可靠性等。芯片设有内建自测试功能来保障其可用性,同时自测试方法简洁,其功能覆盖达80%以上。研究了MT-6000的系统结构,设计了核心部分的内建自测试,包括自测试码产生方法及自测试电路。最后给出了实验分析结果。
The MT - 6000 is the core component of a time - division multiplexed serial data bus con- trol system. The device is a high integration level, fault - tolerance and reliability in rugged environment. The chip has BIST（ Build - in Self - test） to guarantee its availability. It has concise way of self - test. The function coverage of the chip is more than 80%. The structure of system and design the hardcore＇ s BIST which includes the generation method of self - test code and the design of self - test circuit has been researched. At the end of the thesis, the analysis and the results of the experiment is given.
出处
《微处理机》
2011年第5期10-14,共5页
Microprocessors
基金
湖南省自然科学基金项目(09JJ6094)
湖南省科技计划资金项目(2010GK3069)
