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基于时间域建模的晶闸管调压装置缓冲电路设计 被引量:4

Research and Design on Snubber Circuits of Thyristor Voltage Regulator Based on Time-Domain Modeling
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摘要 三相晶闸管交流调压器由于传输线特性、器件半控性和负载电路的影响,在导通和关断瞬间极易造成过电压、过电流和电压电流瞬变现象。RC缓冲电路能有效抑制上述冲击,然而RC参数会影响驱动装置的损耗,如何获得最佳的参数匹配是需要解决的问题。本文按照时间域建模方法分析了一个导通周期内的晶闸管外特性,针对带有缓冲电路的模型,构建了晶闸管能耗指标和对系统冲击的数学描述。提出了将冲击作为约束条件,通过优化能耗指标,配置缓冲电路参数来实现节能抑制冲击的思想。借助Matlab工具得到了最佳参数配置。仿真曲线和实验波形表明优化的缓冲电路参数可以有效抑制系统的冲击并减少能耗,证明了这一设计的有效性。 Due to the characteristics of transmission line,devices' half-controllability,and load circuits,over voltage,over current and voltage and current surge often occur at the moment of turn-on and shut-off in three-phase AC thyristor voltage regulators.RC snubber circuits are able to suppress such surges,the coefficients of which may influence energy loss.In order to solve the problems of optimal coefficients' configuration,this paper studies the output characteristics of a thyristor in one on period based on time-domain modeling,according to the model with snubber circuit,and establishes the power loss index and mathematical descriptions of impact's constraint conditions to system.The idea is proposed of achieving energy saving and surges' suppressions by optimizing power loss index as well as determining snubber circuit's parameters taking surges as constraint conditions,and it is realized by means of MATLAB.Simulation curves and actual waveforms indicate the result of suppression to surges and energy conservation is obvious,which verifies the effectiveness of such designs.
出处 《电工技术学报》 EI CSCD 北大核心 2012年第1期196-201,共6页 Transactions of China Electrotechnical Society
基金 国家自然科学基金重大国际合作项目(607201060062) 中央高校基本科研业务费专项资金(HIT NSRIF 2010100)资助
关键词 晶闸管 缓冲电路 时间域建模 能耗 Thyristor snubber circuits time-domain modeling power loss
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