摘要
此处主要对LDMOS栅漏电容(CGD)进行分析与计算,并借助二维器件模拟软件MEDICI模拟并分析了栅漏电容与漏源电压的关系,通过计算得到的数据与软件模拟结果的对比。研究了场极板长度、场氧化层厚度、P阱注入剂量,漂移区浓度4个结构工艺参数对栅漏电容的影响。
This paper focuses on the analysis of LDMOS gate-drain capacitance（CGD） and calculation,and with the two-dimensional device simulator MEDICI,the relationship between CGD of LDMOS and drain-source votalge is investigated.Effects of the gate-field-plate length,the thickness of plate oxide layer,the implant dosages of the drift region and p-well on CGD are also discussed.
出处
《电力电子技术》
CSCD
北大核心
2012年第3期90-92,共3页
Power Electronics
基金
国家自然科学基金(60876062)~~
关键词
栅漏电容
漂移区
场极板
gate-drian capacitance
drift region
gate-field-plate
