摘要
For an SOI-FPGA （silicon-on-insulator field programmable gate arrays） （VS1000） fabricated with 0.5 ttm SOI-CMOS （silicon-on-insulator complementary-metal-oxide-semiconductor） process, a complete integrated platform of FPGA computer-aided design （CAD） toolset （VDK） is developed, which can convert the Verilog HDL （hardware description language） description into a bitstream and finally download it into an FPGA. Experiments and testing verify that this FPGA CAD works well and efficiently.
For an SOI-FPGA （silicon-on-insulator field programmable gate arrays） （VS1000） fabricated with 0.5 ttm SOI-CMOS （silicon-on-insulator complementary-metal-oxide-semiconductor） process, a complete integrated platform of FPGA computer-aided design （CAD） toolset （VDK） is developed, which can convert the Verilog HDL （hardware description language） description into a bitstream and finally download it into an FPGA. Experiments and testing verify that this FPGA CAD works well and efficiently.
