摘要
采用二维时域有限差分（２Ｄ－ＦＤＴＤ）法精确计算了高速集成电路芯片内互连线的频变等效电路参数．有耗吸收边界条件和非均匀渐变网格技术的提出和应用减少了空间网格的数目，用时间序列预测的方法来预测时域信号或提取传输线频域参数大大减少了ＦＤＴＤ模拟时间，明显提高了计算效率．传输线特性的计算考虑了导体和硅基片损耗，计算结果与其他方法及测量结果比较，一致性较好．
An efficient two dimensional finite difference time domain (2D FDTD) method was used for the accurate computation of frequency dependent parameters for on chip interconnects in high speed ICs. A graded mesh algorithm and lossy absorbing boundary condition were adopted to reduce the number of spatial grid points. The introduction of time series prediction method to predict the signal in time domain or extract the parameters of uniform transmission lines in frequency domain reduces computation time drastically. So, this algorithm has a significant reduction in CPU time and storage requirements as compared with the conventional three dimensional FDTD. The Si substrate and conductor losses were included in our analysis. The simulation results are in good agreement with the results obtained by other methods and measurements.
出处
《上海交通大学学报》
EI
CAS
CSCD
北大核心
2000年第2期161-164,共4页
Journal of Shanghai Jiaotong University
基金
国家博士点基金!(69771008)
关键词
高速集成电路
芯片内互连线
频变参数
有效提取
high speed integrated circuit
on chip interconnects
finite difference time domain method
frequency dependent parameter
