摘要
针对流体系结构中VLIW代码体积对指令存储器的容量和功耗带来的问题,本文通过分析流处理器的指令特征,提出了一种新的VLIW分域压缩技术.在此基础上,本文为流体系结构设计了分布式的片上指令存储器,并提出了SIMD流水的执行模式.实验结果证明,该技术减少了38%的片外指令访存,降低约65%的片上指令存储器空间需求;分布式指令存储器减少了约37%的片上指令存储器面积,使得MASA的系统面积降低了8.92%,并降低了61%的指令存储器功耗.
The huge VLlW code size has brought serious problems to the capacity and energy consumption of instruction memory in stream architecture. Through analyzing the characteristics of instruction, this paper proposes a novel domain-divided VLIW compression scheme, designs a distributed on-chip instruction memory for slream architecture and proposes a new SIMD pipeline execution model. The experiment results show that about 38 % of the off-chip instruction accessing and 65 % of the on-chip instruction memory space demand can be reduced by the compression; the distributed instruction memory depresses about 37% of the area of on-chip instruction memory, and about 8.92 % of the area of MASA stream processor. At the same time, the energy con- sumption of the instruction memory is reduced by 61%.
出处
《电子学报》
EI
CAS
CSCD
北大核心
2012年第7期1379-1385,共7页
Acta Electronica Sinica
基金
国家自然科学基金重点项目(No.61033008)
国家自然科学基金(No.60903041
No.61103080)
教育部博士点基金(No.20104307110002)
国防科学技术大学杰出青年基金(No.CJ11-06-01)
关键词
流体系结构
分布式指令存储器
VLIW压缩
stream architecture
distributed instruction memory
very long instruction word compression
