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一种宽频可编程频率合成器的设计实现

Design of a Wide-Range Programmable Frequency Synthesizer
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摘要 设计了一种宽频率工作范围、可编程的频率合成器.引入自偏置的DLL结构及启动电路扩展系统频率范围,消除误锁定,在保证DLL系统稳定性及不改变系统锁定状态的基础上,实现倍频器倍频因子的随意转换.同时使用两位寄存器配置初始电压,保证系统的快速锁定.该频率合成器用0.13μm 1.8VCMOS工艺实现,工作频率范围为14～700MHz,可供选倍频数为1,2,4,8.在输入时钟为50MHz、倍频数为8、输出时钟频率为400MHz的工作频率下,系统功耗为28.44mW,周期抖动约为9.8ps. . A wide-range programmable frequency synthesizer is presented in this work. This frequency synthesizer uses self-biased DLL and a start-controlled circuit to enlarge the operating frequency range and eliminate harmonic locking problems. The programmable frequency-multiplied output can be quickly switched between xl, x2, x4 and x8 without affecting the lock state of the DLL. The Voltage Initial Selector is used to decrease the locking time. The proposed DLL frequency synthesizer, which has been realized in a CMOS 130- nm, can generate clock signal ranging from 14 to 700 MHz at 1.8 V supply. The total power dissipation is only 28.44 mW and the cycle-to-cycle jitter is about 9. 8-ps at 400 MHz.
作者 李娜 刘文平 吴龙胜 唐威
机构地区 西安微电子技术研究所
出处 《微电子学与计算机》 CSCD 北大核心 2012年第8期149-153,157,共6页 Microelectronics & Computer
关键词 延迟锁相环 频率综合器 可编程倍频器 宽频率工作范围 DLL frequency synthesizer programmable frequency multiplier wide-range
分类号 TN4 [电子电信—微电子学与固体电子学]
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参考文献10

  • 1Chien G, Gray P t A 900--MHz local oscillator u- sing a DLL-based frequency multiplier technique for PCS applications [J]. IEEE Journal of Solid-State Cir- cuits, 2000(35) : 1996-1999.
  • 2Kim C, Hwang I C, Kang S IVL A low-power smallar- ea_7. 28ps jitter 1 GHz DLL-based clock generator [J]. IEEE J Solid-State Circuits, 2002,37 (11) : 1414- 1420.
  • 3Farjad-Rad R, Dally W, Ng H T. A low-power multi- plier DLL for low-jitter multigigahertz clock generation in highly integrated digital chips [J]. IEEE J Solid- State Circuits, 2002,37(12) : 1804-1812.
  • 4Tai-Cheng Lee, Keng-Jan Hsiao. The design and anal- ysis of a DLL-based frequency synthesizer for UWB application[-J. IEEE J Solid-State Circuits, 2006,41 (6) : 1245-1252.
  • 5Kyunghoon Chung, Jabeom Koo, Soo-Won Kim, et al. An anti-harmonic, programmable DLL-based frequency multiplier for dynamic frequency sealing [J]. IEEE A- sian Solid-State Circuits Conference, 2007 : 276-279.
  • 6杨文荣,姜炜阳.一种基于高频时钟产生电路的DLL的研究[J].微计算机信息,2007,23(35):270-272. 被引量：2
  • 7Jin-Han Kim, Young-Ho Kwak, Seok-Ryung Yoon, et al. A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency sealing [J]. IEEE J. Solid-State Circuits, 2006,41 (9) : 516-614.
  • 8Chang H H, Lin J W, Yang C Y, et al. A wide-range delay-locked loop with a fixed latency of one clock cycle [J]. IEEE J Solid-State Circuits, 2002, 37(8).. 1021- 1027.
  • 9Kim CH. A 64--Mbit 640--Mbyte/s bidirectional data strobed, double-data-rate SDRAM with a 40--mW DLLfor a 256--Mbyte memory system [J-1. IEEE J. Solid- State Circuits, 1998(33) .. 1703-1710.
  • 10Foley D J, Flynn M P. CMOS DLL-based 2--V 3.2-- ps jitter 1GHz clock synthesizer clock synthesizer and temperature-compensated tunable oscillator [J]. IEEE J Solid-State Circuits, 2001(36) 417-423.

二级参考文献6

  • 1李肃刚,杨志家.一种改进的全数字锁相环设计[J].微计算机信息,2005,21(09S):42-43. 被引量：20
  • 2David W. Boerstler, A Low-Jitter PLL Clock Generator for Microprocessors with Lock Range of 340-612 MHz, J. Solid State Circuits, vol.34, no.4, April 1999
  • 3John G. Maneatis, Self-Biased High-Bandwidth Low-Jitter 1-to-4096 Multiplier Clock Generator PLL, IEEE J. Solid State Circuits, vol.38, no.11, November, 2003
  • 4David J. Foley, CMOS DLL Based 2V, 3.2ps Jitter, 1 GHz Clock Synthesizer and Temperature Compensated Tunable Oscillator, IEEE J. Solid State Circuits, vol.36, No.3, MARCH 2001
  • 5Chulwoo Kim, A Low-Power Small-Area 7.28-ps-Jitter 1-GHz DLL-Based Clock Generator, IEEE J. Solid State Circuits, vol.37, No. 11, November 2002
  • 6John G. Maneatis, Low-jitter Process-independent DLL and PLL based on self-biased techniques, IEEE J. Solid State Circuits, vol.31, no.11, November 1996

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微电子学与计算机
2012年 第8期

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