Performance Behaviour Analysis of the Present 3-Level Cache System for Multi-Core Processors
Performance Behaviour Analysis of the Present 3-Level Cache System for Multi-Core Processors
摘要
In this paper, a study related to the expected performance behaviour of present 3-level cache system for multi-core systems is presented. For this a queuing model for present 3-level cache system for multi-core processors is developed and its possible performance has been analyzed with the increase in number of cores. Various important performance parameters like access time and utilization of individual cache at different level and overall average access time of the cache system is determined. Results for up to 1024 cores have been reported in this paper.
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