摘要
素域中的模乘运算是椭圆曲线密码体制中必不可少的基本运算,模乘运算的速度影响椭圆曲线算法的整体性能。文中设计了一种融合了窗口技术和流水线技术的素域模乘快速实现方法,采用硬件描述语言VHDL完成模乘的设计实现,并优化设计,充分发挥了流水线的优势。通过Modelsim仿真工具仿真,正确完成一次模乘运算只需要96个时钟周期。在Altera EP2AGX45 FPGA中的运行结果表明:150 Mhz的时钟频率下,完成一次384 bits的模乘运算仅需要0.64 us。
The operation of modular multiplication in prime field is the basic operation absolutely necessary in elliptic curve cryptography, and this operation capability directly affects the overall performance of elliptic curve cryptography. A fast implementation of prime-field modular multiplication with window technology and pipelining technology is designed, and the algorithm of modular multiplication is designed with VHDL, and optimized by fully taking the advantages of pipelining. Simulation with Modelism indicates that an accurate completion of modular multiplication requires only 96 clock circles. And the simulation on AlteraEP2AGX45 FPGA shows that a modular multiplication of 384 bits only takes 0.64 us under 150 Mhz clock frequency.
出处
《信息安全与通信保密》
2013年第9期76-78,共3页
Information Security and Communications Privacy
关键词
素域
模乘
窗口
流水线
prime field
modular multiplication
window
pipelining
