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Optimization and Evaluation of Sputtering Barrier/Seed Layer in Through Silicon Via for 3-D Integration 被引量：1

Optimization and Evaluation of Sputtering Barrier/Seed Layer in Through Silicon Via for 3-D Integration
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摘要 The barrier/seed layer is a key issue in Through Silicon Via(TSV) technology for 3-D integration.Sputtering is an important deposition method for via metallization in semiconductor process. However,due to the limitation of sputtering and a "scallop" profile inside vias,poor step coverage of the barrier/seed layer always occurs in the via metallization process. In this paper,the effects of several sputter parameters(DC power,Ar pressure,deposition time,and substrate temperature) on thin film coverage for TSV applications are investigated.Robust TSVs with aspect ratio 5 1 were obtained with optimized magnetron sputter parameters. In addition,the influences of different sputter parameters are compared and the conclusion could be used as a guideline to select appropriate parameter sets. The barrier/seed layer is a key issue in Through Silicon Via （TSV） technology for 3-D integration. Sputtering is an important deposition method for via metallization in semiconductor process. However, due to the limitation of sputtering and a ＂scallop＂ profile inside vias, poor step coverage of the barrier/seed layer always occurs in the via metallization process. In this paper, the effects of several sputter parameters （DC power, Ar pressure, deposition time, and substrate temperature） on thin film coverage for TSV applications are investigated. Robust TSVs with aspect ratio 5 ： 1 were obtained with optimized magnetron sputter parameters. In addition, the influences of different sputter parameters are compared and the conclusion could be used as a guideline to select appropriate parameter sets.
作者 Tiwei Wei Jian Cai Qian Wang Yang Hu Lu Wang Ziyu Liu Zijian Wu
机构地区 the Institute of Microelectronics the Institute of Microelectronics and Tsinghua National Laboratory for Information Science and Technology
出处 《Tsinghua Science and Technology》 SCIE EI CAS 2014年第2期150-160,共11页 清华大学学报（自然科学版（英文版）
基金 supported by the National Natural Science Foundation of China (No. 61274111) he National Science & Technology Major Project of China (No. 2011ZX02709)
关键词 溅射参数 集成优化 种子层 阻挡层 3-D 评价 硅 半导体工艺 barrier/seed layer Through Silicon Via （TSV） sputtering optimization
分类号 TB383.2 [一般工业技术—材料科学与工程]
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参考文献19

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Tsinghua Science and Technology
2014年 第2期

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