摘要
本文着重研究全数字QAM接收机中载波恢复环路的设计,采用快慢两个数字环路来进行载波恢复。慢环路由锁频器(Frequency Detector)、锁频锁相器(Phase and Frequency Detector)等组成,快环路由相位解旋器和锁相器(Phase Detector)组成。仿真结果表明,在AWGN条件下,两个环路的环路参数设置存在一个最佳点,当两个环路工作在这个最佳点附近时接收机能够很好的进行载波频率、相位的恢复,相位噪声对接收机性能的影响最小。最后,给出了在不同信噪比下的最佳环路参数表。
The design of the carrier recovery loops in an all-digitized QAM receiver is investigated and two cascaded digital carrier recovery loops are proposed. One is the fast loop and the other is the slow loop. The slow loop consists of a frequency detector(FD), a phase-frequency detector(PFD)and a loop filter. The fast loop consists of a phase rotator, a phase detector(PD)and a loop filter. Simulation results show that the two loop parameters have optimal values in AWGN (Additive White Gaussian Noise) channels. When the two loops work around the optimal values, the influence of the phase noise upon the receiver is minimized and good performance can be achieved. Finally, the table of the optimal loop parameter values under different signal-to-noise ratios is presented.
出处
《电路与系统学报》
CSCD
2002年第2期105-109,共5页
Journal of Circuits and Systems
