摘要
A novel SPIC(smart power IC) with a simple APFC(active power factor correction) circuit on one chip is proposed.The V _ bus (bus voltage) with high power factor falls from 600V to 400V by using a delay circuit in which a long channel length NMOS is used to substitute a large biasing resistance to save chip area.The lower V _ bus results in a smaller R _ on (on-resistance) of power switcher,which reduces the power loss of the power devices,improves the efficiency of the circuit,and reduces the cost of circuits.An integrated high voltage over voltage protect circuit is also designed in the circuits.Theory and simulations both prove the correctness and availability of the design.
提出了一种新型的具有简易 APFC的单片 SPIC电路 .通过采用集成在 SPIC内部的延迟电路 ,使有 APFC电路的总线电压由 6 0 0 V下降为 40 0 V.在电路中 ,采用长沟道的 NMOS管来代替大电阻以节省版图面积 .在保证所需的功率因数的情况下 ,总线电压的下降可以直接导致功率开关器件的比导通电阻下降 ,减小功率器件的损耗 ,提高电路的效率 .同时 ,总线电压下降 ,也使电路成本降低 .此外 ,还同时设计了相应的高压过压保护电路 .理论分析与模拟结果都证明该设计是正确的和有效的 .
基金
国家自然科学基金资助项目 (批准号 :6 9776 0 41)~~
