摘要
在复杂实验条件下,需采用非易失性铁电存储器记录重要数据。为防止二次上电时实验数据被覆盖,需设计防掉电功能。文中介绍了一种F-RAM的防掉电设计思路,并基于现场可编程门阵列实现,板级验证工作正常,并已在相关项目中得到应用且达到了预期功能。
The F-RAM is required to record important data in experiments under complex conditions. The power down protection function is necessary to prevent the already valid data from being covered on secondary electricity. A design of a power down protection is introduced and realized on FPGA. The design works well on board, and realizes the expected function in related project applications.
出处
《电子科技》
2014年第7期89-92,共4页
Electronic Science and Technology
关键词
非易失铁电存储器
防掉电
现场可编程门阵列
ferroelectric nonvolatile ram
power down protection
field programmable gate array
