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基于可控采样率及断点保护的数据采编存储器设计 被引量:1

Design of Data Acquisition and Storage Based on Controllable Sampling Rate and Break Address Protection
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摘要 为了提高设计的采编存储器的通用性,采用XILINX公司的FPGA芯片XC3S500E作为控制芯片,选用8通道同步采集的ADI公司的模数转换器AD7606和存储性能稳定的三星公司的FLASH芯片K9WBG08U1M,利用VHDL的并行语言特性以及FPGA内部逻辑电路并行运行的特点,设计了16通道同步采集的可以设置为不同采样率的具有掉电监测功能和FLASH断点保护功能的采编存储器。经过大量实验检验,该采编存储器可使用5种采样率采样,精度达到0.1%FS,是通用性较高的采编存储器。 For improving the universal of the acquisition,the design choose the XILINX FPGA XC3S5OOE as the control chip. It choose the 8-channel synchronous acquisition of ADI ADC AD7606 and the FLASH of Samsung K9WBGOSU1M with stable storage performance. It use the parallel execute features of VHDL and the feature that internal logic execute in parallel of FPGA,achieve the acquisition that with 16 synchronous channels of sampling rate can be set to different and with the function of power-down monitoring and protection functions of FLASH break ad- dress. It is validated by a large number of experimental tests that the acquisition can choose five kinds of sampling rates and has accuracy that achieve 0.1% FS. It is highly versatile acquisition.
出处 《自动化与仪表》 2015年第8期77-80,共4页 Automation & Instrumentation
基金 国家自然科学基金项目(91123036)
关键词 可控采样率 混合编帧 掉电监测 FLASH断点保护 controllable sampling rate mixed framing power-down monitoring protection of FLASH break address
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