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高帧率步进频穿墙成像雷达扫频方法

A Sweep Frequency Method for High Frame Rate Stepped-frequency Through-Wall Imaging Radar
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摘要 步进频是穿墙成像雷达的常用波形,传统采用锁相合成技术的步进频穿墙成像雷达的跳频时间长,帧率很低,难以满足穿墙雷达实时成像的要求。为了解决这个问题,提出了一种新的扫描方案,可以通过现场可编程门阵列(FPGA)实现对扫描方式的可调控制,在不影响回波波形及成像效果的情况下显著提高了步进频穿墙成像雷达的帧率。在2 MHz的频率步长以及2.5 GHz的频段范围内时,实际成像帧率可以达到14 Hz,在一定程度上满足了实时成像的要求。试验测试结果验证了所提方法的可行性。 Stepped-frequency is a common waveform used in through-wall imaging radar( TWIR) . Tradi-tional stepped-frequency TWIR,which uses phase-locked loop( PLL) frequency synthesis technology,has a long frequency hopping time and low frame rate. It’ s difficult to meet the real time imaging demand of TWIR. To solve this problem,a novel scanning scheme is proposed in this paper,which can realize the ad-justable control of scanning mode with Field Programmable Gate Array( FPGA) . This scheme can evidently enhance the frame rate of TWIR without affecting echo waveform and imaging results. With step size equal to 2 MHz and frequency range equal to 2. 5 GHz,the actual frame rate of imaging can reach 14 Hz. The re-quirements of real time imaging can be satisfied to some extent. The feasibility of proposed approach has been proved through experiment.
出处 《电讯技术》 北大核心 2015年第9期1031-1035,共5页 Telecommunication Engineering
基金 国家自然科学基金资助项目(61271441 61372161)~~
关键词 穿墙成像雷达 实时成像 步进频 锁相合成 高帧率 through-wall imaging radar real time imaging stepped-frequency PLL frequency synthesis high frame rate
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  • 1胡学成,刘爱芳,刘中.机载相控阵雷达合成宽带成像技术[J].现代雷达,2008,30(5):61-64. 被引量:5
  • 2鄢华浩,王玫,赵利.基于ΔΣ调制技术的小数分频合成器的设计和实现[J].电子对抗技术,2004,19(6):45-48. 被引量:6
  • 3石寅.我国在芯片研究领域的突破性进展——直接数字频率合成(DDS)芯片[J].中国科学院院刊,2005,20(6):492-494. 被引量:3
  • 4Xu Z W, Jiang S, Wu Y C, et al. A compact dual-band direct- conversion CMOS transceiver for 802.11a/b/g WLANs. IEEE ISSCC Dig Tech Papers, 2005:98.
  • 5Badets F, Camino L, Rieubon S, et al. A multimode GSM/DCS/WCDMA double loop frequency synthesizer. Asian Solid-State Circuits Conference, 2005:201.
  • 6Kuang X F, Wu N J. A fast-settling PLL frequency synthesizer with direct frequency presetting. IEEE International Solid-State Circuits Conference, 2006:741.
  • 7Feng P, Li Y L, Wu N J. An ultra low power non-volatile memory.IEEE Custom Integrated Circuits Conference, 2009:713.
  • 8Bagheri R, Mirzaei A, Chehrazi S, et al. an 800-MHz-6-GHz software-defined wireless receiver in 90-nm CMOS. IEEE Inter- national Solid-State Circuits, 2006:2860.
  • 9Yan X Z, Kuang X F, Wu N J. A smart frequency presetting tech- nique for fast lock-in LC-PLL frequency synthesizer. IEEE Inter- national Symposium on Circuits and Systems, 2009:1525.
  • 10Pellerano S, Levantino S, Samori C, et al. A 13.5-mW 5-GHz fre- quency synthesizer with dynamic-logic frequency divider. IEEE International Solid-State Circuits, 2004:378.

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