摘要
随着器件特征尺寸的缩小,半导体器件受到热载流子注入(HCI)导致的损伤越来越小,采用常用的I-V测试方法很难获得其内部陷阱电荷的准确数据。采用I-V测试和低频噪声测试相结合的方式,分析了65 nm工艺NMOS器件HCI时的特性变化,采用低频噪声技术计算出HCI效应前后氧化层陷阱电荷和界面态陷阱电荷变化量,以及栅氧化层附近陷阱密度情况。通过I-V测试方法只能计算出HCI效应诱生的陷阱电荷变化量,对于其陷阱电荷的分布情况却无法计算,而相比于常用的I-V测试方式,低频噪声测试能更准确计算出随HCI后器件界面态陷阱电荷和氧化层陷阱电荷的具体数值及其HCI效应诱生变化值,并计算出氧化层附近的陷阱电荷空间分布情况。
With scaling down of the feature size of devices,semiconductor devices are less and less damaged by hot carrier injection(HCI).It is difficult to obtain accurate data of the internal trap charge by using the common I-V test method.With the combination methods of I-V test and low frequency noise test,the characteristic changes of the n-channel MOSFETs in 65 nm technology during HCI were analyzed.The changes of the oxide layer trap charge and the interface trap charge induced by HCI effect and trap density near the gate oxide interface before and after HCI test were calculated by low frequency noise technology.The changes of the trap charge induced by HCI effect can only be calculated by I-V test me-thod,but the distribution of the trap charges can’t be calculated.Compared with the common I-V test method,the specific values of the interface trap charge and the oxide layer trap charge and the change values induced by HCI effect can be calculated accurately by using the low-frequency noise test after HCI,and the spatial distribution of the trap charge near the oxide layer can also be calculated.
作者
何玉娟
刘远
章晓文
He Yujuan;Liu Yuan;Zhang Xiaowen(School of Microelectronics,Xidian University,Xi'an 710071,China;Science and Technology on Reliability Physics and Application of Electronic Component Laboratory,CEPREI,Guangzhou 510610,China)
出处
《半导体技术》
CAS
北大核心
2019年第7期531-536,共6页
Semiconductor Technology
基金
国家自然科学基金资助项目(61574048,61204112)
广东省省级科技计划项目(2017B090921001,2018A050506044)
