摘要
随机数产生器在工程模拟等领域获得广泛应用,MRG32k3a是一种性能优异的随机数产生器,但产生速率较慢。针对这种情况,在研究MRG32k3a串行算法的基础上,利用算法并行化理论,提出一种基于MIC(Many Integrated Core)平台的MRG32k3a并行化方法。实验结果表明,该方法能通过Test U01的全部测试,移植到MIC平台后加速比与线程数呈线性增长关系,相对CPU单线程的最佳加速比为17.73。
Random number generator is widely used in engineering simulation, MRG32k3a is a random number generator with excellent performance, but its generation rate is slow. In view Of this, this article presents an MIC platform-based MRG32k3a parallelisation approach using the theory of algorithm parallelisation according to the study on MRG32k3a serial algorithm. Experimental results show that the approach can pass all the tests of uniform random number test-library TestU01. After transplanting to MIC platform, the relationship of the speedup ratio and the number of threads increases linearly, and the best speedup ratio relative to CPU single-thread reaches 17.73.
出处
《计算机应用与软件》
CSCD
2016年第2期250-253,289,共5页
Computer Applications and Software
基金
陕西省自然科学基础研究计划项目(2013JM8028)
