摘要
在异步时序逻辑电路的设计过程中,以波形分析为基础,通过电路的状态转换图得到电路的时序图,通过时序图的分析确定触发器的时钟方程,在时钟方程的作用下得到状态转换,填写次态卡诺图,通过次态卡诺图的化简得到输出方程和状态方程的设计方法。该方法简单实用,学生易于理解和接受。
The Design of asynchronous sequential logic circuit is based on the waveform analysis, and through the state of the circuit transition diagram circuit timing diagram. The flip-flop clock equation is determined by the analysis of the se-quence diagram. Obtain.state transitions under the action of a clock equation,and fill in the next state karnaugh map. Design the method of output equation and the equation of state by state Karnaugh graph simplification. The method is simple and practical, and can easy be understood and accepted by students.
出处
《新技术新工艺》
2016年第2期37-39,共3页
New Technology & New Process
关键词
异步时序逻辑电路
时序图
时钟信号
asynchronous sequential logic circuit, timing sequence diagram, clock signal
