摘要
100Gb/s线路侧光收发模块中ADC的时钟设计关键在于保证时钟的低抖动性,是光模块可靠工作的基础。介绍了100Gb/s线路侧光收发模块的基本架构和工作流程,提出两种时钟方案,对比分析了两种方案的性能,对线路侧光收发模块中ADC的时钟设计具有一定参考借鉴意义。
The key of ADC clock design in the 100Gb/s line side transponder is low jitter that keeps the transponder work reliable. The paper describes the structure and workflow about 100Gb/s line side transponder, and introduces two proposals with comparison. It has certain value of reference for high speed sampling clock design in line side transponder.
出处
《光通信技术》
北大核心
2016年第3期40-42,共3页
Optical Communication Technology
