摘要
提出了一种新型的超低相位噪声电压控制振荡器(Voltage contral oscillator,VCO)结构,该结构能够在不增加额外电感、不增大芯片面积的前提下,实现输出电压摆幅的大幅度提高,使得摆幅可以高于供电电压且低于地电位,进而改进VCO的相位噪声。采用TSMC 0.13μm CMOS工艺对该VCO进行设计。芯片测试结果表明,该VCO的振荡频率为5.5~6.2 GHz,在5.8 GHz振荡频率处,相位噪声达到-126.26 d Bc/Hz@1 MHz,消耗的功耗为2.5 m W。归一化FOM指标达到-197.5d Bc/Hz。
A new ultralow-phase-noise Voltage Control Oscillator( VCO) configuration is presented. The VCO can achieve an output voltage swing above the supply voltage and below the ground potential to improve the phase noise while requiring no additional inductor for a small chip area. The VCO was designed in TSMC 0. 13 μm CMOS process. Measurement results shows that the proposed VCO exhibits a operation frequency range from 5. 5 to 6. 2GHz,a phase noise of- 126. 26 d Bc / Hz at an offset of 1 MHz from an oscillation frequency of 5. 8 GHz and a FOM of- 197. 5 d Bc / Hz while dissipating 2. 5 m W.
出处
《科学技术与工程》
北大核心
2016年第11期194-197,共4页
Science Technology and Engineering
关键词
压控振荡器
相位噪声
输出电压摆幅
voltage control oscillator
phase noise
output voltage swing