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基于CPCI总线的高速数据接收卡设计与实现

Designed and Implementation of High-speed Data Receiving Card Based on CPCI
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摘要 针对CPCI总线满足目前数据传输速率和容量的更高要求,设计出一种多通道的高速数据接收卡,它采用可编程逻辑器件FPGA实现,首先对接收卡的工作原理进行了介绍,板卡使用双端口RAM对数据缓存,用可编程逻辑器件控制数据接收及与CPCI计算机的交互。与以往接收卡相比,每秒向驱动程序报中断的次数不变,这样更加符合计算机的传输特点。该板卡数据传输结合DMA传输和突发方式,传输速率高和时延低,在多种测控系统中得到应用。经验证,其性能可靠性满足工程要求。 Aiming at the higher requirements of data transmission speed and capacity of CPCI bus, a multi-channel high-speed data receiving card is designed in this paper, which is implemented by using FPGA, This paper introduces the operating principle. Its interaction with CPCI computer is controlled by FPGA and all the receiving data is buffered in a dual ported RAM. Compared to former receiving cards, this card is more suitable to computer transmission because of its fLxed interruption per second with the driver. Combined with DMA transmission and burst mode, this card has a higher transmission speed and lower delay, which is much applied to flight control systems. The test results show that the reliability of this card can meet the engineering requirement.
作者 贺琛
出处 《计算机与网络》 2016年第7期61-63,共3页 Computer & Network
关键词 CPCI总线 DMA 突发传输 CPCI DMA burst mode
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