摘要
针对大规模集成电路测试中需要采集记录总线数据并用于后续产品测试分析的目的,采用了基于FPGA的数据采集存储系统的软硬件设计方法,硬件采用"上位机+下位机"架构,下位机直接由FPGA直接控制FLASH阵列盘,实现长时数据采集存储,上位机在采集完成后通过USB接口对数据进行离线分析,通过对采集系统的硬件进行设计与仿真,开发出与下位机控制盒相配套的采集软件,进行实际数据采集试验得出所采集的16路总线数据信号有效。
For the purpose of the product test analysis after collected and recorded the bus data onto the large scale integrated circuits testing. It is adopted software and hardware design method of data acquisition and storage system which based on FPGA. The hardware adopted ＂ Host computer ＋ Slave computer ＂ structures, Slave computer is controlled flash disk arrays of the FPGA directly, Achieve long time data acquisition and storage, The Host computer analysis data through the USB interface after the completion of the acquisition, Through the design and simulation of acquisition system hardware, and developed the software of the control box is. The 16 bus data signals collected by practical data acquisition experiment is effective.
出处
《电子设计工程》
2016年第13期85-87,91,共4页
Electronic Design Engineering
