摘要
本文提出了一种应用于L波段的锁相频率合成电路的设计方案。给出了基于PE3236芯片的锁相环电路设计方案。通过仿真验证和实验结果重点论述锁相环环路带宽与环路输出相位噪声和环路捕获时间之间的关系。实验结果表明,该方案可以被应用于导航接收机射频前端,该频率合成器电路性能稳定,满足实际应用需求。
This paper presents a project design application for the L band frequency synthesizer. Also it propose the realized of the PLL circuit is based on PE3236.In order to satisfy the relation between the loop output phase noise,loop lock time andthe PLL loop width. The experiment and application show that this design can be applicative on the front-end satellite receiver navigation, also the frequency synthesizer has good performance, and appropriate for the actual requirement.
出处
《电子设计工程》
2017年第5期74-78,共5页
Electronic Design Engineering
