摘要
为满足电力和测控通讯等领域对高精度时钟的要求,结合GPS/BD时钟无累积误差和晶振时钟无随机误差的特性,提出了一种新型的基于GPS/BD双模接收机的时钟驯服的软、硬件设计及其实现方法。该方法通过构建权重系数将GPS和BD信号滤波得到的钟差估计值和钟差速度估计值进行融合,实现了基于GPS/BD双模融合授时的时钟驯服系统。在系统软件设计中,采用滑动中位数方法剔除测量数据中的异常点,应用无偏FIR滤波算法对钟差数据进行滤波,以提高时钟偏差的滤波精度;在ARM的控制下,应用数字PID控制算法产生控制电压,由D/A转换器调节晶振输出频率,实现快速驯服本地时钟。实验结果表明,所提出时钟驯服方法的时间同步精度达到了50 ns,优于基于单模GPS和单模北斗的时间同步系统。
In order to meet the request of nigh precision clock for the electric power and control communication fields, a new method of software and hardware design and implementation for clock disciplining with GPS/BD dual-mode receiver has been proposed combined with the characteristics of the GPS/BD clock without random error and oscillator without accumulation error, which could improve the es- timation accuracy of clock bias by fusing the GPS clock bias data and the BD clock bias data. Furthermore ,the sliding median method has been employed in the software design to eliminate the abnormal data in the measurement data and the accuracy of the clock filter has been improved with unbiased FIR filtering algorithm to filter the clock bias data. Under the control of ARM processor, the control voltage for oscillator has been acquired by adopting the digital PID control algorithm and the oscillator output frequency has been adjusted with D/A converter, which aimed at achieving a fast tamable local oscillator. According to the experimental results, the time synchronization preci- sion of the proposed method has reached 50 ns, which is nigher than single mode GPS and single mode BD time synchronization system.
出处
《计算机技术与发展》
2017年第5期201-204,共4页
Computer Technology and Development
基金
国家自然科学基金资助项目(60904089)
