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三相并网逆变器锁相环频率特性分析及其稳定性研究 被引量:37

Frequency Characteristics Analysis and Stability Research of Phase Locked Loop for Three-phase Grid-connected Inverters
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摘要 并网逆变器的锁相环用来实现并网电流的相位跟踪,其会对并网逆变器输出阻抗特性及其稳定性产生影响。因此,首先采用谐波线性化方法,推导了考虑锁相环前后并网逆变器的正负序输出阻抗模型,指出由于引入了锁相环,逆变器输出阻抗的小信号等效电路多了一条锁相环等效阻抗的并联支路。其次,对两种常用的锁相环电路(同步参考坐标系锁相环和双二次广义积分锁频环)的频率特性进行了对比研究,研究表明锁相环频率特性的不同使得逆变器输出阻抗低频段存在差异。为此,采用基于阻抗的分析方法,研究了不同电网阻抗条件下锁相环对并网系统稳定性的影响;对并网系统的稳定性进行了实验验证,实验结果证明了理论分析的正确性。 For grid-connected inverters, phase-locked loop (PLL) is usually used for the injected grid current to achieve phase tracking of the grid voltages, which means the PLL control loop will have an effect on the output impedance characteristics and the stability of grid-connected inverters. Hence, the harmonic linearization method was firstly adopted to derive the positive- and negative-sequence output impedance models of the three-phase grid-connected inverter with and without the PLL. It was indicated that the additional equivalent impedance would be added in parallel with the ideal output impedance of the inverter due tothe PLL. Second, two kinds of the commonly used PLL circuits that are synchronous reference frame phase locked loop (SRF-PLL) and dual second order generalized integrator frequency locked loop (DSOGI-FLL) were employed 'to compare and analyze their frequency characteristics. It was shown that their different frequency characteristics introduced the diversities of the output impedances of the inverter in the low frequency band. Therefore, based on the impedance-based analysis method, the effects of the PLL on the grid-connected system stability were studied under different grid impedance conditions. Finally, the grid-connected system stabilities with different PLLs were verified by the experimental results, which effectively proved the correctness of the theoretical analysis.
出处 《中国电机工程学报》 EI CSCD 北大核心 2017年第13期3843-3853,共11页 Proceedings of the CSEE
基金 国家高技术研究发展计划(2014AA052002) 国家电网公司专项科技项目(NYB17201500218) 江苏省研究生培养创新工程(KYLX_0268)~~
关键词 并网逆变器 锁相环 谐波线性化 阻抗判据 阻抗稳定性 grid-connected inverter phase-locked loop (PLL) harmonic linearization impedance criterion impedancestability
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