期刊文献+

基于FPGA的1553B总线信号收发和验证 被引量:7

Transceiver and validation of 1553B bus signal based on FPGA
下载PDF
导出
摘要 目前,1553B总线的信号收发多选用专用芯片实现,但此类实现方案存在不能进行总线信号验证、无法获知信号失真、系统拓展性不强等问题。为解决这些问题,选择FPGA与A/D、D/A相结合的方式,设计总线信号收发和验证模块。经过实验验证,设计的收发模块可以顺利实现1553B总线信号的接收解码、发送编码,同时能够获取完整的信号波形,验证其是否符合标准要求,此外具有产生失真波形的功能,为故障模拟打下基础。该模块的逻辑功能都通过FPGA实现,后期的升级扩展十分方便。 At present,sending and receiving signals in the 1553B bus always relied on special chips,but there were some problems with such implementation scheme,such as unable to verify bus signal or obtain signal distortion,and without enough system expansibility.To solve these problems,this paper chose the combination of FPGA and ADC,DAC,to design a bus signal transceiver and validation module.After experimental verification,the transceiver module designed in this paper could not only realize the reception decoding and sending coding of 1553B bus signal,but also obtain the whole signal waveform to verify whether it meet standard.In addition,this transceiver module had function of generating the distorted waveform,so that laid a foundation for fault simulation.Besides,all the logic functions of this transceiver module were realized by FPGA,it would be easy to upgrade and extend.
出处 《国外电子测量技术》 2017年第8期59-65,共7页 Foreign Electronic Measurement Technology
关键词 1553B总线 FPGA 总线信号收发 故障模拟 1553B bus FPGA bus signal receiving and sending fault simulation
  • 相关文献

参考文献11

二级参考文献74

共引文献169

同被引文献77

引证文献7

二级引证文献26

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部