摘要
SOI(Silicon-On-Insulator)是一种在未来很有竞争优势的工艺技术,但由于其与体硅工艺结构上的不同,给其ESD设计带来了额外的挑战。通过串联的NMOS管来提高输出管的触发电压,以提升输出缓冲器的ESD能力。
Silicon-on-insulator（SOI） is a potential high-performance technology due to its inherent structural advantage over bulk Silicon-based technology. However, the structural differences create additional challenges for providing ESD protection in SOI devices. The paper utilizes SOI＇s structural advantage of series N M O S to improve ESD characteristics of output buffer.
出处
《电子与封装》
2017年第12期45-47,共3页
Electronics & Packaging
