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复杂网络交流信息传输正确性识别仿真

Simulation of Fragmentation Data Reorganization Method in Computer Applications
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摘要 对复杂网络交流信息传输正确性的识别,能够有效提高网络应用程序的稳定性。对信息传输正确性识别,需要估计统计概率模型,计算识别结果并取平均值,完成应用程序中信息传输正确性的识别。传统方法首先识别信息传输类型,提取信息传输特征,但忽略了计算识别结果并取其平均值,导致识别精度低。提出复杂网络交流信息传输正确性识别方法。将信息传输正确性先验分布并选择,将选择问题转换为置信度问题进行求解,估计概率模型,计算识别结果取平均值,实现复杂网络交流信息传输正确性的识别。实验结果表明,所提方法能够有效提高复杂网络的稳定性。 The traditional method ignores the calculation of recognition result and average value, which leads to low recognition accuracy. This paper proposes a method for identifying the transmission correctness of communication information in eomplex networks. Firstly, this method carries prior distribution for correctness of information transmission and selection. Secondly, the selection problem is converted into the reliability problem for the solution, and the probability model is estimated, then the recognition result is calculated and the average value is obtained. Finally, the recognition of correctness for complex network communication information transmission is realized. Simulation results show that the proposed method can effectively improve the stability of complex network.
出处 《计算机仿真》 北大核心 2017年第12期393-397,共5页 Computer Simulation
关键词 复杂网络 信息传输 正确性识别 Complex network Information transmission Correctness identification
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  • 1吴晓颖,张万君,杨雨迎,崔军.可编程电子时间引信保险距离动态试验方法的优化设计[J].制导与引信,2009,30(1):1-5. 被引量:2
  • 2朱艮春,魏光辉,潘晓东,邓小林.典型通信电台带内干扰辐射效应研究[J].微波学报,2011,27(6):93-96. 被引量:7
  • 3戴小俊,杨绪光,丁铁夫,郑喜凤.基于USB2.0的高速数据通信接口设计[J].电子器件,2006,29(4):1320-1324. 被引量:15
  • 4LI Qianfeng and HU Qingsheng. A 10ps 500MS/s two-channel Vernier TDC in 0.18 CMOS technology[C]. IEEE Workshop on Advanced Research and Technology in Industry Applications (WARTIA), Ottawa, Canada, 2014: 1268-1271.
  • 5BREZINA C, FU Y, ZAPPON F, et al. GOSSIPO-4: evaluation of a Novel PLL-based TDC-technique for the readout of gridpix-detectors[J]. IEEE Transactions on Nuclear Science, 2014, 61(2): 1007-1014.
  • 6UCHIDA Daisuke, IKEBE Masayuki, MOTOHISA Junichi, et al. A 12-bit, 5.5-μW single-slope ADC using intermittent working TDC with multi-phase clock signals[C]. International Conference on Electronics, Circuits and Systems (ICECS), Marseille, France, 2014: 770-773.
  • 7KALISZ J, SZPLET R, PELKA R, et al. Single-chip interpolating time counter with 200-ps resolution and 43-s range[J]. IEEE Transactions on Instrumentation and Measurement, 1997, 46(4): 851-856.
  • 8KATOH Kentaroh, DOI Yoshihito, ITO Satoshi, et al. An analysis of stochastic self-calibration of TDC using two ring oscillators[C]. IEEE Conference on Asian Test Symposium (ATS), Jiaosi Township, China, 2013: 140-146.
  • 9URANO Yuki, YUN WonJoo J, KURODA Tadahiro, et al. A 1.26 mW/Gbps 8 locking cycles versatile all-digital CDR with TDC combined DLL[C]. International Symposium on Circuits and Systems (ISCAS), Beijing, China, 2013: 1576-1579.
  • 10PELKA R, KALISZ J, and SZPLET R. Nonlinearity correction of the integrated time-to-digital converter with direct coding[J]. IEEE Transactions on Instrumentation and Measurement, 1997, 46(2): 449-453.

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