摘要
硬件在环实时仿真系统如RT-LAB、RTDS等近年在电力电子研究领域中得到了广泛的应用。在使用硬件在环仿真的过程中,研发人员往往关注仿真机的最小步长而忽视仿真机输入到输出的延迟指标。针对采用滞环电流控制的并网逆变器,研究了硬件在环实时仿真中输入到输出延迟指标的重要性。通过理论研究、仿真和实验得出在滞环电流控制的硬件在环仿真中,仿真机的输入到输出延迟对滞环电流控制有明显的负面影响,它会导致滞环比较带宽增加,进而降低滞环比较控制的开关频率,让并网逆变器的电流谐波增大,使得硬件在环仿真下的控制器性能劣于真实系统。即使仿真机保持较小的仿真步长,也无法真实有效地模拟出真实的滞环电流控制系统的性能。随着开关频率的提高,一味地通过提高仿真机性能来解决硬件在环仿真准确度问题的思路并不可取,未来需要考虑其他技术手段来缓解该问题。
In recent years, hardware -in -the loop （HIL） simulation such as RT- LAB and RTDS are widely used in the research of power electronic system. In order to keep the simulation accuracy, the main concern of researchers normally focuses on the minimum simulation step size of the simulator, while neglects the role of input - to - output delay of the simulator. Aiming at the grid-connected converter with hysteresis current control, the importance of simulator delay is studied. Through theoretical analysis, simulation and experiments, it is found out that the delay of the simulator seriously affects the control performance： it can apparently increase the hysteresis current band, reduce the switching frequency, increase the current THD （ total harmonic distortion） and therefore deteriorate the control. With the input - out - delay, even if the simulation step is kept small, the simulation results are neither accurate nor trustable. With the increasing of switching frequency nowadays, oth- er technical means should be adopted to alleviate the effect of delay rather than purely reducing the simulation step.
出处
《四川电力技术》
2018年第1期61-66,共6页
Sichuan Electric Power Technology
关键词
硬件在环
实时仿真
延迟
滞环电流控制
并网逆变器
hardware - in - the loop （ HIL ） simulation
real -time simulation
delay
hysteresis current control
grid - connected converter
