摘要
针对合成孔径雷达(SAR)回波模拟的实时性需求,提出了一种基于高层次综合(HLS)的回波模拟硬件加速系统。实时性是衡量回波模拟系统性能的重要指标,随着成像区域复杂度、成像质量要求等不断提高,回波模拟的计算复杂度急剧增加,模拟过程耗时巨大。将FPGA应用于SAR回波生成硬件加速,并引入高层次综合方法,解决了传统硬件开发的算法转换繁琐、不支持浮点运算等关键问题,经过验证能达到较高的性能与精度,保证了回波模拟的实时性,具有较高的应用价值。
Aimed at real-time demand of synthetic aperture radar（SAR）echo simulation,an echosimulation hardware acceleration system based on High Level Synthesis is proposed. Real-time is a significant indicator to measure the performance if echo simulation system. Along with the complexity of imaging area and requirements of imaging quality continue to increase,a sharp increase in computational complexity appears and echo simulation becomes time-consuming. Therefore,Field Programmable Gate Array（FPGA） is used in hardware acceleration of SAR echo generation,and High Level Synthesis method was introduced. Key issues such as cumbersome algorithms convert and unsupported floatingpoint operations in traditional hardware development are solved. It＇s proven that the design could achieve higher performance and accuracy,ensure real-time echo simulation,and has a high application value.
作者
韩思齐
韩力
孙林
吴琼之
HAN Si-qi;HAN Li;SUN Lin;WU Qiong-zhi(School of Information and Electronics, Beijing Institute of Technology, Beijing 100081, China)
出处
《电子设计工程》
2018年第11期158-164,共7页
Electronic Design Engineering
