摘要
设计实现了面向多通道阵列信号处理的可重构异构SoC。SoC集成了多通道阵列信号处理需要的多个硬件加速模块,有效提高了多通道阵列信号处理系统的计算能力。通过软件对各个算法模块的输入输出流向进行重构,达到了多通道阵列信号处理算法可重构的目的,扩展了SoC的适用范围。采用55nm工艺进行设计,版图尺寸为6.2mm×4.5mm,规模约为1 000万门。流片后的测试结果验证了多通道阵列信号处理算法的有效性,证明了SoC设计的正确性。
A reconfigurable heterogeneous SoC was designed and implemented,which was applied in multichannel array signal processing system.The SoC integrated several hardware algorithm modules which were required by the multi-channel array signal processing,so the computing ability of multi-channel array signal processing system was improved.It could be reconfigured by software to control the directions of each algorithm module＇s inputs and outputs.Therefore,it met the different algorithm demands in various application cases and expanded SoC＇s applications.The SoC was designed in a 55 nm process,and there were about ten million gates in 6.2 mm × 4.5 mm layout.After the SoC taped out,the tested results not only verified the effectiveness of the algorithm of multi-channel array signal processing,but also proved the correctness of the SoC design.
作者
杨亮
于宗光
魏敬和
桂江华
潘邈
YANG Liang; YU Zongguang; WEI Jinghe; GUI Jianghua; PAN Miao(No. 58 Research Institute, China Electronics Technology Group Corp. , Wuxi , Jiangsu 14035, P. R. China)
出处
《微电子学》
CAS
CSCD
北大核心
2018年第5期648-651,656,共5页
Microelectronics
基金
国家自然科学基金资助项目(61704161)
关键词
SOC
可重构
多通道阵列信号处理
SoC
reconfigurablel multi-channel array signal processing
