摘要
针对QPSK变速率调制数字系统,提出了一种新的基于现场可编程门阵列(FPGA)实现方法,该系统可以支持4.88 Kb/s到2 Mb/s和更高的连续比特速率。设计采用混合乘法器、数控振荡器(NCO)和积分-梳状滤波器(CIC),并给出了系统中载波和信号恢复电路的设计结构,且可以移植到任何FPGA器件。提出的设计在Xilinx Virtex-5 FPGA平台进行了硬件测试。硬件实现结果显示,采用本方法实现的解调器,表现出优越的使用效率。
In order to achieve QPSK variable rate modulation digital system,a novel based onfield programmable gate array (FPGA)implementation method is proposed. The system can support4.88Kb/s to 2Mb/s and higher continuous bit rate.Design with the mixed multiplier,numericallycontrolled oscillator(NCO)and integral comb filter(CIC),and the structure of carrier recovery circuitand signal of the system is described. This system can be ported to any FPGA device. The proposeddesign of the hardware tests in the Xilinx Virtex-5 FPGA platform. The test results show that theproposed demodulator show superior ability in efficiency.
作者
毛小群
MAO Xiao-qun(Chongqing College of Electronic Engineering,Chongqing 401331,China)
出处
《火力与指挥控制》
CSCD
北大核心
2016年第8期181-184,共4页
Fire Control & Command Control
关键词
变速率
调制器
比特速率
现场可编程门阵列
variable rate
modulator
bit rate
field programmable gate array(FPGA)
