摘要
文中利用可编程门阵列(FPGA)技术的可重构性与灵活性,设计实现曼彻斯特编解码器。通过FPGA分别实现曼彻斯特编解码器的信号产生,编码部分,解码部分3个模块。采用硬件描述语言VHDL完成了编解码器模块设计,使用Quartus II软件和Modelsim软件进行对编译码器进行相应功能仿真及时序仿真。结果表明,所设计的曼彻斯特编译码器的数据传输具有强抗干扰能力,高传输速率,该过程也具有较高的可靠性。
This article uses the reconfigurability and flexibility of Field- Programmable Gate Array (FPGA) to design and implement the Manchester codec. The signal generation,encoding part and decoding part of the Manchester codec are respectively implemented by the FPGA. The codec module design is completed by hardware description language VHDL. The Quartus II software and Modelsim software are used to perform corresponding function simulation and timing simulation on the codec. The results show that the designed Manchester codec has strong anti- interference ability and high transmission rate,and the process also has high reliability.
作者
董毅
何刚强
梁汉文
倪凯诚
黄秋月
DONG Yi;HE Gang-qiang;LIANG Han-wen;NI Kai-cheng;HUANG Qiu-yue(College of Information Science and Technology,Chengdu University of Technology,Chengdu 610000,China)
出处
《电子设计工程》
2019年第10期15-18,23,共5页
Electronic Design Engineering
基金
四川省成都理工大学创新训练项目(201810616147)
