期刊文献+

一种4阵元BDII/GPS抗干扰接收机RF前端设计 被引量:3

Design of a 4-element BDII/GPS Anti-jamming RF Receiver Front-end
原文传递
导出
摘要 实现了一种双通道4阵元接收前端,包含一种低插损无源三端口分路器。在公共端口复用有源低噪声放大器,替代了常规的分路有源放大及功率分配电路,通过电路复用减小了通道功耗,将常规的双频段功率分配插损从3dB分配插损及约1dB器件损耗减小至0.5dB。该多端口无源电路实现了30dB以上的隔离度,还减少了一级预选滤波器。给出了高线性度通道的设计方法,提高通道输入线性度(IIP3)的同时降低了功耗,优化了通道噪声系数,实现了一种4阵元低功耗BDII/GPS双模抗干扰有源天线。测试结果表明,该接收机同时实现了4通道3.63W总功耗,输出线性度(OIP3)超过29dBm,噪声系数小于1.5dB,抗单音干扰优于90dB。 A dual-channel 4-element receiving front-end was realized, which included a low insertion loss passive three-port splitter. The active low noise amplifier was multiplexed at the public port, instead of the conventional shunt active amplifier and power distribution circuit. The channel power consumption is reduced by circuit multiplexing, and the insertion loss of conventional dual-band power distribution is reduced from 3 dB allocation insertion loss plus about 1 dB device loss to 0.5 dB. The multi-port passive circuit achieves isolation of more than 30 dB, thus reducing the first-order preselected filter. The design method of high linearity channel was given. The input channel linearity(IIP3) was improved while the power consumption was reduced, and the channel noise factor was optimized. A 4-element low power BDII/GPS dual-mode anti-jamming active antenna was realized. The test results show that the receiver achieves 4-channel 3.63 W total power consumption at the same time, the output linearity(OIP3) exceeds 29 dBm, the noise figure is less than 1.5 dB, and the anti-monotone interference is better than 90 dB.
作者 王晓光 WANG Xiaoguang(The 10th Research Institute of CETC,Chengdu,610036,CHN)
出处 《固体电子学研究与进展》 CAS 北大核心 2019年第3期174-178,共5页 Research & Progress of SSE
基金 装备预研领域基金资助项目(61405180503) 新型地基区域导航技术资助项目(H7036.1) 省自然科学基金资助项目(201701D121066)
关键词 BDII/GPS 双模 4阵元 三端口电路 电路复用 抗干扰 BDII/GPS dual-mode 4-elements three-port circuit multiplexing circuit anti-jamming
  • 相关文献

参考文献9

二级参考文献43

共引文献23

同被引文献10

引证文献3

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部