摘要
p+屏蔽区的槽栅4H-SiC功率MOSFET可以进行优化设计,优化结构由2个n型导电柱、3个p型导电柱、氧化物和轻掺杂n型电流扩散层(NCSL)构成,其中氧化物位于栅极沟槽下方,NCSL位于p-body下。n型导电柱、p型导电柱与NCSL形成的电流路径,加速了横向电流在外延层的扩散,缓解沟槽底部角处的高电场,进而减小了比导通电阻(R_(on,sp)),提高了击穿电压(V_(BR))。优化结构在Silvaco TCAD环境下的二维仿真结果表明:结构优化前后的沟槽MOSFET的R_(on,sp)、V_(BR)分别提高了22.2%、21.0%,最大优值提高了79.0%。与传统的沟槽MOSFET结构相比,优化结构具有更低的栅漏电荷,可较好地满足高频领域的应用需求。
In this paper,a trench 4 H-SiC power MOSFET with p+shield region is optimized.The optimized structure consists of two N-type conductive columns,three P-type conductive columns,oxide and lightly doped N-type current spread layer(NCSL),where the oxide is located below the gate trench and the NCSL is located under the p-body.N-type conductive columns,p-type conductive columns and NCSL form a current path that accelerates the spread of transverse current in the epitaxial layer and alleviates the high electric field at the bottom corner of the trench,which in turn reduces the specific on-state resistance(R_(on,sp))and increases breakdown voltage(V_(BR)).Two-dimensional simulations of the optimized structure in the Silvaco TCAD environment show that the R_(on,sp) and V_(BR) of the trench MOSFETs before and after the structure optimization are increased by 22.2% and 21.0%,respectively,and the maximum optimum value is increased by 79.0%.Compared with the usual trench MOSFET structure,the optimized structure has a lower gate leakage charge and can better meet the requirements of high frequency applications.
作者
沈培
温娜
荣妮
李涛涛
SHEN Pei;WEN Na;RONG Ni;LI Tao-tao(School of Mechanical and Electronic Engineering,Pingxiang University,Pingxiang Jiangxi 337000;Pingxiang Industrial School,Pingxiang Jiangxi 337099,China)
出处
《萍乡学院学报》
2020年第6期48-52,共5页
Journal of Pingxiang University
基金
江西省教育厅科学技术研究项目(GJJ191154)
萍乡学院青年科研基金(2018D0230)
江西省高等学校大学生创新创业训练计划项目(S202010895020)。
