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基于FPGA+DSP架构的RapidIO接口硬件技术与实现 被引量:5

Design and implementation of Rapidio hardware interface based on FPGA+DSP
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摘要 RapidIO传输效率高、系统成本低、系统稳定性好,在高性能嵌入式系统中得到了广泛的应用。传统的RapidIO总线致力于解决器件间、板间和子系统间等同一机箱内或同一系统内的背板互连问题。为使多个嵌入式系统互联保持总线的一致性,并能在机箱间使用RapidIO总线,需要对RapidIO总线的使用范围进行扩展。本文提出了基于FPGA+DSP架构的通用RapidIO接口硬件实现方案。通过引入光电模块,将RapidIO的LVDS信号转换成光信号,在机箱间传输信号,成功拓展了RapidIO传输距离,解决了RapidIO传输距离局限于一个机箱内的问题主要从硬件方面对RapidIO接口实现方案进行阐述。最后搭建实验平台对所实现的RapidIO总线进行了连通性测试,证明了此种方案的可行性。 RapidIO Protocol has been widely used in high-performance embedded systems because of its high transmission efficiency, low system cost and good system stability. The traditional RapidIO bus is dedicated to realizing of backplane interconnection such as between devices, between boards or between subsystems in the same chassis or within the same system. In order to maintain the consistency of the bus for the interconnection of multiple embedded systems, and to make RapidIO bus applicable between chassis, The RapidIO bus range needs to be expanded. In this paper, the implementation scheme of a general RapidIO interface hardware based on FPGA+DSP architecture is proposed. By introducing the photoelectric module,the RapidIO LVDS signal is converted into an optical signal, and the signal is transmitted between the chassis, which successfully expands the RapidIO transmission distance and solves the problem that the RapidIO transmission distance is limited to in one chassis. The RapidIO interface implementation scheme from the hardware aspect is expounded. Finally, the experimental platform is built to test the connectivity of the implemented RapidIO bus, which proves the feasibility of the scheme.
作者 余晖冬 龚昊龑 王书磊 Yu Huidong;Gong Haoyan;Wang Shulei(Navy Troop 92145,PLA,Shanghai 200080,China)
机构地区 中国人民解放军
出处 《船电技术》 2022年第1期49-53,共5页 Marine Electric & Electronic Engineering
关键词 RAPIDIO 嵌入式互连 FPGA DSP RapidIO embedded interconnection FPGA DSP
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  • 3钱宏,李广侠.Turbo码S随机交织器的实现[J].舰船电子工程,2011,31(2):67-69. 被引量:1

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