摘要
针对现有高可用性无缝环网基于CPU进行数据过滤方案存在的处理效率低的问题,提出了一种基于FPGA的过滤方案。分析高可用性无缝环网中的报文特点,基于FPGA的逻辑单元和存储单元进行重复过滤过滤模块(HSR_MUX)的设计,采用双重策略进行重复报文的过滤,最后搭建测试平台验证方案的可靠性。测试结果表明,基于FPGA的过滤技术可提高数据的处理效率,数据处理效率较常规的CPU过滤方案更有优势。
Aiming at the low processing efficiency of the existing data filtering scheme based on CPU in high availability seamless ring network,a filtering scheme based on FPGA was proposed.The packet characteristics of high availability seamless ring network are analyzed.The repetitive filtering filter module(HSR_MUX)based on FPGA logic unit and storage unit is designed.Dual strategy to filter repeated packets is adopted.Finally,a test platform is built to verify the reliability of the scheme.The test results show that the filtering technology based on FPGA can improve the data processing efficiency,and the data processing efficiency is more advantageous than the conventional CPU filtering scheme.
作者
赖沛鑫
谢金莲
胡明健
黄伟锋
LAI Peixin;XIE Jinlian;HU Mingjian;HUANG Weifeng(Guangzhou Baiyun Electric Equipment Co.,Ltd.,Guangzhou 510460,China;Guangzhou Metro Group Co.,Ltd.,Guangzhou 510335,China)
出处
《电工技术》
2022年第23期1-4,共4页
Electric Engineering
